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Monday
February 21, 2005
From: EDACafe
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About This Issue
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DesignCon 2005
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Feruary 14-18, 2005 By Dr. Jack Horgan
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Read business product alliance news and analysis of weekly happenings
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In early February I attended DesignCon 2005, an educational conference and technology exhibition exclusively for practicing engineers in the semiconductor and electronic design communities. The show is managed by IEC, the International Engineering Consortium. IEC is a nonprofit organization dedicated to catalyzing technology and business progress worldwide in a range of high-technology industries and their university communities. Since 1944, the IEC has provided high-quality educational opportunities for industry professionals, academics, and students.
In October 2004 the IEC announced a new program - the DesignVision awards-that will recognize and honor latest advances in the electronic - design and semiconductor industries. The DesignVision awards will recognize technologies, applications, products, and services judged to be the most unique and beneficial to the electronic-design and semiconductor industries. The awards also will honor corporations and individuals for innovative contributions and developments that have proven important to society. During the show DesignVision honors were presented to 19 companies and organizations in 10 categories. This was a big hit with those who were nominated. Among the winners were ... The
DesignVision awards are to become an annual event. The conference was officially sponsored by Agilent Technologies.
DesignCon conference offered eight parallel tracks of parpers and presentation covering the following topics.
- Chip-Level Functional Design
- Chip-Level Physical Design and Verification
- Power and Package Co-Design
- PCB, Package, and Passive Technologies
- Chip and Board Interconnect Design
- High-Performance Backplane Interconnect Design
- High-Speed Timing, Jitter and Noise
- Power Integrity
- Functional Verification
- Business Issues
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As always the choice is difficult for a generalist trying to understand what is going on across a broad spectrum of topics but probably more appropriate for some one focused on one or two critical areas. With the exception of the last topic, the tracks were highly technical. The papers were distributed on a CD.
The three scheduled plenary speakers were not surprisingly the CEO's of the three major EDA companies: Michael Fister of Cadence, Aart de Geus of Synopys and Wally Rhines of Mentor Graphics. Micheal Fister was replaced by Ted Vucurevich, Cadence CTO. Mr. Fister could not attend due to a commitment related to Cadence's announced acquisition of Verisity. Scuttlebutt was that Mr. Fister had to go to meet with government officials in Israel (Verisity is an Israeli firm). For some this was a disappointment as Mr. Fister is the least known of the three CEO since he joined Cadence only a year ago.
The scheduling was well thought out. The keynotes, executive panels and assorted panels were scheduled in separate time slots from the technical papers. The exhibition (+100 exhibitors) was open 12:30 to 6:30 on the last two days of the events. This avoided conflicts with two thirds of the papers and all the keynote addresses. There was an egalitarian spirit on the exhibit floor in that all the booths were the same size so that small firms were not dwarfed by neighboring booths of larger players as happens elsewhere. The booths were manned by knowledgeable individuals ready to talk in technical terms.
Aart de Geus began his speech by mentioning that he had just returned from the World Economic Forum. He was not name-dropping as he used this to establish a framework for his talk. (Since my invitation to the WEF must have gotten lost in the mail, I visited their website - see later for info.). The conference discussed how the world is changing and how to make it better. The conference concluded that the major problems facing the world can not be solved in isolation. The problems and therefore the solutions are interrelated. There is no chance to solve poverty without dealing with educational issues. There is no chance to solve education without dealing with health issues.
And there is no chance to solve any of these problems without dealing with corruption that erects barriers and siphons off the aid directed at the health, education and poverty problems. Aart commented that we can use the same framework of systemic thinking that applies to most of these global issues to think about the issues that face our industry at 45 nanometers.
The combination of technology and economics, what Aart termed “technonomics” over the past few years has had an immense impact on what we do in our industry. The utilization of semiconductors in electronics has increased dramatically from digital watches and pocket calculators to wireless networks.
There have been three waves, namely computation, communication, and convergence. The last wave has been consumer driven. Here the consumer that spends $3 billion annual on phone rings is more typically a teenage girl. Such a consumer has an appetite for products that costs only tens of dollars. New products aimed at this consumer must fit within the allowance budget.
Today there is another wave of consumers overlaying this picture. Currently, there are about 700 to 800 million people in the middle class. From the last 5 years to the next 40 years, one generation, we will see a doubling of the middle class. This will come not in Western societies but in places like China and India. High tech will blossom in many parts of the world. However, there is a difference of 4:1 or 5:1 in the income level and therefore in the amount of disposal income. This demographic change will dramatic increase the volume demand for consumer products but will also put increasing pressure for lower prices. In contrast to past generations and past economies this
generation is very well connected with access to any piece of data, anytime and anywhere.
In the past the major concern of EDA customers was Quality of Results (QoR). They had a need to optimize their designs for area, timing and power. Today and in the future the major concerns are time to results (TTR) and cost of results (COR). Time to results has become less and less predictable in an era where product lifecycles and market windows are shrinking. Cost of results will be a crucial driver for the next decade driven by economics, nature of consumer markets and increasing technical difficulty.
The solutions to problems of the past such as shrinking geometries and increasing frequencies have brought their own set of problems. Making things smaller means that things are closer together which causes issues of signal integrity. Making things smaller means that feature size becomes less than the wavelength of light use to create them, thereby challenging the capabilities of lithography. Adding function has become easy relative to the task of verifying that the function is correct. Functional verification now consumes 50% of the time and cost. Today there are increasing problems with respect to leakage current, systematic defects versus random defects, printability and
manufacturing yield.
The point is not that there are problems but that none of these problems is independent of the other. There is a need to optimize timing, area, power and yield functions but we must realize that each tradeoffs against the other. We need to have the same understanding and observations across the entire flow. The tools and methodologies need to be integrated very well. This has nothing to do with being in the same data base but with the correlation of observation, understanding and analysis capabilities from tool to tool. If a floor planner does not understand place & route, then major problems are likely downstream.
There are design techniques available to address many of the problems mentioned above including via redundancy, addition of dummy fills, optical proximity correction (OPZC) and so on. However, these need to be applied with a full understanding of their implications on timing and mask printability. We know which transistors are critical and we must leverage that information. EDA job is to design such that it doesn't negatively impact yield. We must alter our thinking from solving individual problems to increasingly systematic solutions that bring it all together.
Ted Vucurevich, Cadence CTO and surprise replacement for his boss CEO Mike Fisher, was energetic. He demonstrated several consumer electronic products: Xbox, a mobile glucose meter for diabetics, a satellite radio, the highly successful Apple iPoD and a digital camera built by Fuji. He speculated that the functionality of all these devices might converge into a single device.
The overarching theme of his talk was collaboration. Dozens of companies cooperated in bringing these products to market including some firms far afield from traditional EDA customers. This will increasing be the case as the consumer electronics market demands content as well as devices. Without a huge catalog of reasonable priced and easily accessible music iPOD might not have been as successful as it is. Cooperation and collaboration was the order of the day.
Wally Rhines, CEO of Mentor Graphics reminded us of the theory of Dr. Tsugio Makimoto, Corporate Advisor at Sony Corporation that describes the cyclical nature of the semiconductor industry which alternates directions between customization and standardization every 10 years beginning in 1957.
A standard discretes (diodes, transistors) beginning in 1957 discrete
B Custom LSI for TVs, calculators beginning in 1967
C Standard memories and microprocessors beginning in 1977
D ASICS beginning in 1987
E Field Programmability beginning in 1997
According to this theory we should be due for another shift in 2007 to custom-programmable devices.
Wally Rhines also pointed out there is a separate cycle in that every 15 years a new level of abstraction appears which significantly increases ease of use and productivity. Previous examples are from transistors to gates to RTL. Current we are seeing a shift towards ESL (Electronic System Level). As a consequence of these quantum leaps in design-language abstraction the number of people who can design ICs increases by an order of magnitude. Wally estimated that there were about 5,000 people who could design custom IC in the 1970s. During the ASIC hayday in the 1980s there were around 50,000 people who could design ASICs. Today he says that there are about 500,000 people who can
program FPGAs. If the trend line continues there would be 5 million system designers in about a decade. Of course extrapolation often leads to unrealistic and even absurd results. Imagine how tall the average person would be, if we continue to grow throughout our lifetime. Some outside factor generally intervenes to reduce or stop growth of any kind. Even if this number of system designers were to be only 1 million, there will considerable increases in architectural innovation which will drive the business forward.
World Economic Forum
Incorporated as a foundation, and based in Geneva, Switzerland, the World Economic Forum is impartial and not-for-profit; it is tied to no political, partisan or national interests. The Forum has NGO consultative status with the Economic and Social Council of the United Nations. The WEF describes itself as “the foremost global community of business, political, intellectual and other leaders of society committed to improving the state of the world.”
The Annual Meeting is the World Economic Forum's flagship for a larger set of activities that include regional meetings and initiatives. The central goal of the Meeting is to find solutions to global challenges. The Annual Meeting began in 1971, then called the Davos Symposium, and it takes place in Davos, Switzerland each year in January. Over 2000 people take part in an intensive five-day programme of workshops and interview-style panel discussions that focus on crucial global, regional and industry issues.
Participants include people from all over the world including business leaders, members of civil society organizations and the media, academics, scientists and policy-makers.
The meeting often brings people together who ordinarily wouldn't have the chance to meet. The Annual Meeting offers an unparalleled platform for leaders to address the most pressing global challenges that can't be debated adequately in industry- or region-specific settings. Participants can interact with a diverse range of leaders from other fields.
The Annual Meeting has an Open Forum which is a series of debates open to the public. Speakers include policy-makers, NGO representatives and business leaders.
The Annual Meeting acts as a catalyst for action and facilitates collaboration among different stakeholders thereby helping the organization to achieve its mission.
The programme includes topics so diverse and far reaching that it is difficulty to give any sort of overview.
On the WEF website (www.weforum.org) there is a list of web casts on a variety of topics. Among the speakers listed are (no first names): Blair, Chirac, Clinton, Dell, Gates, Gore, and Schröder.
At the close of the forum there was a call for the implementation of a series of concrete measures designed to yield immediate and long-lasting results on poverty and environment. Participants urged the adoption of technology to reduce the emission of greenhouse gases, the creation of a fund to accelerate financial aid to the poorest nations and the removal of trade barriers that deprive developing countries of the dividends of global economic growth.
Kumi Naidoo, Secretary-General and Chief Executive Officer, Civicus-World Alliance for Citizen Participation, South Africa, pointed out that each of these issues is intertwined. All have to be pursued in parallel, just as globalization has made it impossible to ignore the global impact of the plight facing distant communities, he said. “Central to us moving the world forward in the next year and beyond is the understanding that human beings live integrated lives.”
Hewlett-Packard
A lot has been written about HP and its controversial and recently fired CEO Carly Fiorina. The numbers for the last quarter have now been released.
While Personal Systems generated more revenue than Imaging/Printing segment, the Imaging/Printing segment generated more than 6 times the amount of earnings and nearly 90% of overall earnings. Many critics have suggested separating the Imaging and Printing business from the Personal Systems and Enterprise divisions which compete with Dell among others. Long term HPers complain that HP has lost its commitment to innovation (the HP logo contains the word invent). They point to the recent deal to resell Apple iPODs under an HP label.
Hewlett-Packard Co. put the search for ousted Chief Executive Carly Fiorina's replacement in the hands of executive recruiter Russell Reynolds Associates. Such searches can bring in a hefty fee. When Google hired Heidrick & Struggles to find a CEO (Novell Inc. Chairman and CEO Eric Schmidt took the job), they took their fee from then cash poor Google in stock which when sold generated net proceeds of $129 million.
Weekly Highlights
EDA News
EDGE Design Delivers New Mentor Graphics Web Site Design And Architecture
HP Reports First Quarter 2005 Results
Synopsys Posts Financial Results for First Quarter of Fiscal 2005
Zuken launches upgraded version of desktop 3D PCB design tool CADSTAR 3D 4.4
LSI Logic licenses Ethernet MAC Core from Mentor Graphics
ATI Technologies Selects Cadence Palladium II for Verification of Advanced DTV Chips
Virtual Silicon Announces Industry's First Delta-Sigma Fractional-N PLL Digital Frequency Synthesizer For Generic CMOS
TransEDA introduces unique Expression Coverability Analysis to dramatically enhance coverage accuracy
Cadence Selects "Home Away from Home" for Veterans' Families as Beneficiary of Stars & Strikes Fundraiser
Cadence Donates Technology to IEEE to Enhance SystemVerilog Usability; Data Types and IP Encryption to Be Part of Initial IEEE SystemVerilog Standard
Worldwide EDA Tech Forum Series Starts on March 16
Mentor Graphics and Synopsys Offer SystemVerilog Seminars for Users of the Verisity e Language
NetSilicon Cuts Verification Time and Effort in Half With Synopsys' Vera Tool
Aarohi Deploys Synopsys' VCS Native Testbench to Verify Next-Generation Storage Chip
Synopsys Introduces Migration Service From Verisity Specman Elite(R) to Synopsys VCS(R) Verification Solution
Celoxica Delivers Advanced Synthesis Technology for SystemC; Agility Compiler Delivers ESL Implementation Flow for SoC Prototyping and Verification
IP & SoC News
Cypress Delivers Industry's First Single-Chip Algorithmic Search Engine; Innovative Algorithmic Search Engine Enables Lowest-Cost Packet Processing Subsystems
Nordic Semiconductor Launches the nRF24AP1 - an Ultra-low Power 2.4GHz Transceiver Embedded With Dynastream's ANT Protocol for Wireless Personal Area Networks (PAN)
Altera Updates PowerPlay Early Power Estimator to Reflect Lower Power Consumption of Stratix II FPGAs
ARC International Announces New Roadmap of Pre-Optimized Configurable Processor Cores
STMicroelectronics Launches Lowest Cost Integrated SoC Solution Targeting Wireless-Infrastructure Signal-Processing Applications
North American Semiconductor Equipment Industry Posts January 2005 Book-to-Bill Ratio of 0.80
WJ Communications Announces Fourth Quarter and Fiscal Year 2004 Results
NVIDIA Reports Operating Results for the Fourth Quarter and Fiscal Year 2005
Fairchild Semiconductor's New Low-Power Dual Analog Switch Exceeds "USB 2.0 High Speed" Bandwidth Requirements
Intel Scientists Develop World's First Continuous Laser from Standard Silicon; Major Advance Could Lead to New Innovations in Computing, Communications and Medical Applications
Zarlink Semiconductor Appoints Kirk Mandy as New CEO
TI Introduces Precision Data Acquisition Microsystems in Tiny QFN Package
Altera Announces DSP Co-Processing Kit Featuring Cyclone II FPGA and TI's ADS5500 Data Converter
Acoustic Technologies Licenses StarCore SP1203 Processor Subsystem; Versatile DSP Technologies to Power Next-Generation Products
TriQuint Semiconductor Sets New Size and Performance Standards with Breakthrough Quad-Band GSM/GPRS PA Module
Intel Computer Chip Becomes World's First Silicon Laser
Jazz Semiconductor Expands Advanced Analog Platform with Addition of Vertical PNP Module
NewLogic Launches WiLD-Mobile IP Enabling Low Cost WLAN Integration into Mobile Products
National Semiconductor Introduces New Family of Low-Voltage SIMPLE SYNCHRONOUS Buck Regulators
Powerwave Introduces Micro Twin 2100 Tower-Mounted Amplifier Featuring Break-Through Compact Design, along with Twin TMA 1800
Micron Technology, Inc., Introduces Advanced Feature Set with New 2-Megapixel System-On-A-Chip Image Sensor for Mobile Handsets
Oxford Semiconductor Launches World's First SATA to USB Bridge Chip for Next Generation External Storage
RF Micro Devices Introduces World's Smallest Linear Power Amplifier Module With Integrated Power Detector Technology For WCDMA Handsets
New TI Power Amplifier Digital Pre-Processor Chip Dramatically Cuts Wireless Base Station Costs
AMD Opteron Processor Continues Industry Leadership With the Introduction of the World's Highest Performing 4P and 2P X86 Processors for 32-Bit and 64-Bit Computing
Erik Cleage Leaves Altera
Cypress to Sell MRAM Subsidiary
Atmel Unveils New FingerChip Sensor Dedicated to Mobile Communication Applications, Combining Security and System Navigation Capabilities
TDK Electronics Corporation Names James Browning President and Chief Operating Officer
TI Sampling First OMAP-Vox(TM) Device Delivering Advanced Multimedia Applications on Mainstream Mobile Phones
Advanced Semiconductor Engineering, Inc. Announces January 2005 Net Revenues
More EDA in the News and More IP & SoC News
Upcoming Events...
--Contributing Editors can be reached by clicking here.
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